PIC18LF24K Datasheet, PDF (234/594 Pages) –

PIC18(L)F26/45/46K40
19.4 Timer1/3/5 Prescaler
Timer1/3/5 has four prescaler options allowing 1, 2, 4 or
8 divisions of the clock input. The CKPS bits of the
TxCON register control the prescale counter. The
prescale counter is not directly readable or writable;
however, the prescaler counter is cleared upon a write to
TMRxH or TMRxL.
19.5 Secondary Oscillator
A secondary low-power 32.768 kHz oscillator circuit is
built-in between pins SOSCI (input) and SOSCO
(amplifier output). This internal circuit is to be used in
conjunction with an external 32.768 kHz crystal. The
secondary oscillator is not dedicated only to
Timer1/3/5; it can also be used by other modules.
The oscillator circuit is enabled by setting the SOSCEN
bit of the OSCEN register (Register 4-7). This can be
used as the clock source to the Timer using the
TMRxCLK bits.The oscillator will continue to run during
Sleep.
Note:
The oscillator requires a start-up and
stabilization time before use. Thus, the
SOSCEN bit of the OSCEN register
should be set and a suitable delay
observed prior to enabling Timer1/3/5. A
software check can be performed to
confirm if the secondary oscillator is
enabled and ready to use. This is done by
polling the SOR bit of the OSCSTAT
(Register 4-4).
19.6 Timer1/3/5 Operation in
Asynchronous Counter Mode
If control bit SYNC of the TxCON register is set, the
external clock input is not synchronized. The timer
increments asynchronously to the internal phase
clocks. If external clock source is selected then the
timer will continue to run during Sleep and can
generate an interrupt on overflow, which will wake-up
the processor. However, special precautions in
software are needed to read/write the timer (see
Section 19.6.1 “Reading and Writing Timer1/3/5 in
Asynchronous Counter Mode”).
Note:
When switching from synchronous to
asynchronous operation, it is possible to
skip an increment. When switching from
asynchronous to synchronous operation,
it is possible to produce an additional
increment.
19.6.1
READING AND WRITING
TIMER1/3/5 IN ASYNCHRONOUS
COUNTER MODE
Reading TMRxH or TMRxL while the timer is running
from an external asynchronous clock will ensure a valid
read (taken care of in hardware). However, the user
should keep in mind that reading the 16-bit timer in two
8-bit values itself, poses certain problems, since the
timer may overflow between the reads. For writes, it is
recommended that the user simply stop the timer and
write the desired values. A write contention may occur
by writing to the timer registers, while the register is
incrementing. This may produce an unpredictable
value in the TMRxH:TMRxL register pair.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 234