PIC18LF24K Datasheet, PDF (541/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 37-4: I/O PORTS
Standard Operating Conditions (unless otherwise stated)
Param
No.
Sym.
Characteristic
Min.
Typ†
Max. Units
Conditions
VIL
Input Low Voltage
I/O PORT:
D300
with TTL buffer
—
—
0.8
V 4.5V  VDD  5.5V
D301
—
—
0.15 VDD V 1.8V  VDD  4.5V
D302
D303
with Schmitt Trigger buffer
—
with I²C levels
—
—
0.2 VDD V 2.0V  VDD  5.5V
—
0.3 VDD V
D304
with SMBus levels
—
—
0.8
V 2.7V  VDD  5.5V
D305
MCLR
—
—
0.2 VDD V
VIH
Input High Voltage
I/O PORT:
D320
with TTL buffer
2.0
—
—
V 4.5V  VDD 5.5V
D321
0.25 VDD +
—
0.8
—
V 1.8V  VDD  4.5V
D322
D323
with Schmitt Trigger buffer 0.8 VDD
—
with I²C levels
0.7 VDD
—
—
V 2.0V  VDD  5.5V
—
V
D324
with SMBus levels
2.1
—
—
V 2.7V  VDD  5.5V
D325
IIL
MCLR
Input Leakage Current⁽¹⁾
0.7 VDD
—
—
V
D340
I/O Ports
—
±5
± 125
nA VSS  VPIN  VDD,
Pin at high-impedance, 85°C
D341
D342
MCLR⁽²⁾
—
±5
± 1000 nA VSS  VPIN  VDD,
Pin at high-impedance, 125°C
—
± 50
± 200
nA VSS  VPIN  VDD,
Pin at high-impedance, 85°C
IPUR Weak Pull-up Current
D350
25
120
200
A VDD = 3.0V, VPIN = VSS
VOL
Output Low Voltage
D360
I/O ports
—
—
0.6
V IOL = 10.0mA, VDD = 3.0V
VOH
Output High Voltage
D370
I/O ports
VDD - 0.7
—
—
V IOH = 6.0 mA, VDD = 3.0V
D380 CIO
All I/O pins
—
5
50
pF
†
Note 1:
2:
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Negative current is defined as current sourced by the pin.
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 541