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SH7047 Datasheet, PDF (739/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series
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Pin Function
Pin State
Reset State
Power-Down State
Power-On
Type
MMT
Port
control
Pin Name
ROM
Enabled
PCIO
Z
PUOA, PUOB Z
PVOA, PVOB
PWOA, PWOB
POE0 to POE6 Z
ROM
Single-
Disabled Chip
Manual
I/O
O
I
Hardware
Standby
Z
Z
Software
Standby
K*1
Z*2
Sleep
I/O
O
Z
Z
I
SCI
SCK2, SCK3 Z
SCK4(PE21) Z
I/O
Z
I/O
Z
Z
I/O
Z*2
I
RXD2, RXD3 Z
RXD4(PE19) Z
TXD2, TXD3 Z
TXD4(PE20) Z
I
Z
Z
I
I
Z
Z*2
I
O
Z
O*1
O
O
Z
O*1
O
A/D
AN0 to AN15 Z
converter ADTRG
Z
I/O port PA0 to PA15 Z
I
Z
I
Z
I/O
Z
Z
I
Z
I
K*1
I/O
PB0 to PB5
PD0 to PD8
PE0 to PE8,
PE10
PE9,
Z
PE11 to PE21
I/O
Z
Z*2
I/O
UBC
PF0 to PF15 Z
UBCTRG
Z
I
Z
Z
I
O
Z
O*1
O
[Legend]
I: Input
O: Output
H: High-level output
L: Low-level output
Z: High impedance
K: Input pins become high-impedance, and output pins retain their state.
Bus
Release
State
I/O
O
Software
Standby in
Bus Right
Release
State
K*1
Z*2
I
Z
I/O
Z
I
Z*2
I
Z
I
Z*2
O
O*1
O
O*1
I
Z
I
Z
I/O
K*1
I/O
Z*2
I
Z
O
O*1
Table B.2 Pin States (2)
Pin Function
Type
H-UDI
Pin Name
TMS
TRST
TDI
TDO
TCK
Power-On
(DBGMD
=H)
Z
Z
Z
Z
Z
Reset State
Power-On
(DBGMD
=L)
Manual
I
I
I
I
I
I
O/Z
O/Z
I
I
Pin State
Power-Down State
Test Reset
I
I
I
Z
I
Hardware
Standby
Z
Z
Z
Z
Z
Software
Standby
I
I
I
O/Z
I
Sleep
I
I
I
O/Z
I
No
Connection
Prohibited
Prohibited
Prohibited
O/Z
Prohibited
Rev. 2.00, 09/04, page 699 of 720
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