SH7047 Datasheet, PDF (462/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

15.3.4 Bit Timing Configuration Register 0 (HCAN2_BCR0)
BCR is a 32-bit register that is used to set the HCAN2 bit timing and baud rate prescaler. It is
composed of two 16-bit registers, HCAN2_BCR1 and HCAN2_BCR0. (HCAN2_BCR0 is
abbreviated to BCR0 in this section.)
Initial
Bit
Bit Name Value R/W Description
15 to 8 —
All 0 R
Reserved
These bits are always read as 0. The write value should
always be 0.
7
BRP7
0
R/W Baud Rate Prescaler (BRP)
6
BRP6
0
R/W Set the time quanta length. The length should be set
5
BRP5
0
R/W ^{(BRP value + 1) times of the system clocks for HCAN2}
(φ/2).
4
BRP4
0
R/W
00000000: 1 system clock
3
BRP3
0
R/W
00000001: 2 system clocks
2
BRP2
0
R/W
00000010: 3 system clocks
1
BRP1
0
R/W
:
0
BRP0
0
R/W
11111110: 255 system clocks
11111111: 256 system clocks
15.3.5 Interrupt Request Register (IRR)
IRR is a 16-bit interrupt status flag register.
Initial
Bit Bit Name Value R/W Description
15
IRR15
0
R/W Timer Compare Match Interrupt Flag 1
Indicates that a compare match occurred in TCMR1.
0: Timer compare match has not occurred in TCMR1
1: Timer compare match has occurred in TCMR1
[Clearing condition]
• Writing 1
[Setting condition]
• TCMR1 = TCNTR
Note: This bit is not set when TCMR1 = H′0000.
Rev. 2.00, 09/04, page 422 of 720