SH7047 Datasheet, PDF (609/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

19.9 Program/Erase Protection
There are three kinds of flash memory program/erase protection; hardware protection, software
protection, and error protection.
19.9.1 Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. Flash memory control register 1 (FLMCR1), flash memory control register 2
(FLMCR2), erase block register 1 (EBR1), and erase block register 2 (EBR2) are initialized
Item
FWP pin protect
Reset/standby
protect
Protect Function
Description
Program Erase
When a high level is input to the FWP pin,
Yes
Yes
FLMCR1, EBR 1, and EBR 2 are initialized, and the
program/erase protection state is entered.
In the reset state (including the reset state when Yes
Yes
the WDT overflows) and standby mode, FLMCR1,
EBR 1, and EBR 2 are initialized, and the
program/erase protection state is entered.
In a reset via the RES pin, the reset state is not
entered unless the RES pin is held low until
oscillation stabilizes after powering on. In the case
of a reset during operation, hold the RES pin low
for the RES pulse width specified in the AC
Characteristics section.
Rev. 2.00, 09/04, page 569 of 720