SH7047 Datasheet, PDF (596/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Initial
Bit Bit Name Value R/W
7 FWE
1/0
R
6 SWE
0
R/W
5 ESU
0
R/W
4 PSU
0
R/W
3 EV
0
R/W
2 PV
0
R/W
1E
0
R/W
0P
0
R/W
Description
Flash Write Enable
Reflects the input level at the FWP pin. It is set to 1 when
a low level is input to the FWP pin, and cleared to 0 when
a high level is input.
Software Write Enable
When this bit is set to 1 while the FWE bit is 1, flash
memory programming/erasing is enabled. When this bit
is cleared to 0, other FLMCR1 bits and all EBR1 and
EBR2 bits cannot be set.
Erase Setup
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to the erase setup state.
When it is cleared to 0, the erase setup state is
cancelled.
Program Setup
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to the program setup state.
When it is cleared to 0, the program setup state is
cancelled.
Erase-Verify
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to erase-verify mode. When
it is cleared to 0, erase-verify mode is cancelled.
Program-Verify
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to program-verify mode.
When it is cleared to 0, program-verify mode is
cancelled.
Erase
When this bit is set to 1 while the FWE, SWE and ESU
bits are 1, the flash memory changes to erase mode.
When it is cleared to 0, erase mode is cancelled.
Program
When this bit is set to 1 while the FWE, SWE and PSU
bits are 1, the flash memory changes to program mode.
When it is cleared to 0, program mode is cancelled.
Rev. 2.00, 09/04, page 556 of 720