SH7047 Datasheet, PDF (458/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Initial
Bit Bit Name Value R/W Description
0
MCR0
1
R/W Reset Request
When this bit is set to 1, the HCAN2 transits to reset
mode. For details, refer to section 15.4.1, Hardware and
Software Resets.
[Setting conditions]
• Power-on reset
• Manual reset
• Hardware standby
• Software standby
• 1-write (software reset)
[Clearing condition]
• When 0 is written to this bit while the GSR3 bit in GSR
is 1
Note: Before writing 0 to this bit, confirm that the GSR3 bit
is 1.
15.3.2 General Status Register (GSR)
GSR is a 16-bit register that indicates the HCAN2 status.
Initial
Bit Bit Name Value R/W
15 to 6 —
All 0 R
5
GSR5
0
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Error Passive Status Bit
Indicates whether the HCAN2 is in the error passive state.
0: HCAN2 is not in the error passive state
1: HCAN2 is in the error passive state
[Clear condition]
• HCAN2 is error active state
[Setting condition]
• When TEC ≥ 128 or REC ≥ 128
Rev. 2.00, 09/04, page 418 of 720