SH7047 Datasheet, PDF (459/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Initial
Bit Bit Name Value R/W Description
4
GSR4
0
R
Halt/Sleep Status Bit
Indicates whether the HCAN2 interface is in halt mode or
sleep mode.
0: Not in halt or sleep mode
1: In halt (MCR1 = 1) or sleep (MCR5 = 1) mode
[Setting condition]
• MCR1 or MCR5 is set, and CAN bus is suspended or
in the idle state.
3
GSR3
1
R
Reset Status Bit
Indicates whether the HCAN2 module is in the normal
operating state or the reset state.
[Setting condition]
• When entering configuration mode after the HCAN2
internal reset has finished
[Clearing condition]
• When entering normal operation mode after the
MCR0 bit in MCR is cleared to 0 (Note that there is a
delay between clearing of the MCR0 bit and the GSR3
bit.)
2
GSR2
1
R
Message Transmission Status Flag
Flag that indicates whether the module is currently in the
message transmission period.
[Setting condition]
• No message transmission requests
[Clearing condition]
• Transmission is in progress
1
GSR1
0
R
Transmit/Receive Warning Flag
[Clearing conditions]
• When TEC < 96 and REC < 96
• When TEC ≥ 256
[Setting condition]
• When 256 > TEC ≥ 96 or 256 >REC ≥ 96
Rev. 2.00, 09/04, page 419 of 720