SH7047 Datasheet, PDF (195/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

• Timer interrupt enable register_3 (TIER_3)
• Timer status register_3 (TSR_3)
• Timer counter_3 (TCNT_3)
• Timer general register A_3 (TGRA_3)
• Timer general register B_3 (TGRB_3)
• Timer general register C_3 (TGRC_3)
• Timer general register D_3 (TGRD_3)
• Timer control register_4 (TCR_4)
• Timer mode register_4 (TMDR_4)
• Timer I/O control register H_4 (TIORH_4)
• Timer I/O control register L_4 (TIORL_4)
• Timer interrupt enable register_4 (TIER_4)
• Timer status register_4 (TSR_4)
• Timer counter_4 (TCNT_4)
• Timer general register A_4 (TGRA_4)
• Timer general register B_4 (TGRB_4)
• Timer general register C_4 (TGRC_4)
• Timer general register D_4 (TGRD_4)
Common Registers
• Timer start register (TSTR)
• Timer synchro register (TSYR)
Common Registers for timers 3 and 4
• Timer output master enable register (TOER)
• Timer output control enable register (TOCR)
• Timer gate control register (TGCR)
• Timer cycle data register (TCDR)
• Timer dead time data register (TDDR)
• Timer subcounter (TCNTS)
• Timer cycle buffer register (TCBR)
Rev. 2.00, 09/04, page 155 of 720