SH7047 Datasheet, PDF (426/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

13.3.4 A/D Trigger Select Register (ADTSR)
The ADTSR enables an A/D conversion started by an external trigger signal.
Initial
Bit Bit Name Value R/W
7 to 4 
All 0
R
3
TRG1S1 0
R/W
2
TRG1S0 0
R/W
1
TRG0S1 0
R/W
0
TRG0S0 0
R/W
Description
Reserved
These bits are always read as 0, and should only be
written with 0.
AD Trigger 1 Select 1 and 0
Enable the start of A/D conversion by A/D1 with a trigger
signal.
00: A/D conversion start by external trigger pin (ADTRG)
or MTU trigger is enabled
01: A/D conversion start by external trigger pin (ADTRG)
is enabled
10: A/D conversion start by MTU trigger is enabled
11: A/D conversion start by MMT trigger is enabled
When changing the operating mode, first clear the TRGE
and ADST bit in the A/D control registers (ADCRs) to 0.
AD Trigger 0 Select 1 and 0
Enable the start of A/D conversion by A/D0 with a trigger
signal.
00: A/D conversion start by external trigger pin (ADTRG)
or MTU trigger is enabled
01: A/D conversion start by external trigger pin (ADTRG)
is enabled
10: A/D conversion start by MTU trigger is enabled
11: A/D conversion start by MMT trigger is enabled
When changing the operating mode, first clear the TRGE
and ADST bit in the A/D control registers (ADCRs) to 0.
Rev. 2.00, 09/04, page 386 of 720