SH7047 Datasheet, PDF (478/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

15.3.12 Receive Complete Registers (RXPR1, RXPR0)
RXPR1 and RXPR0 are 16-bit registers containing status flags that indicate normal reception of
data frames in mailboxes.
• RXPR1
Bit Bit Name
15 RXPR31
14 RXPR30
13 RXPR29
12 RXPR28
11 RXPR27
10 RXPR26
9
RXPR25
8
RXPR24
7
RXPR23
6
RXPR22
5
RXPR21
4
RXPR20
3
RXPR19
2
RXPR18
1
RXPR17
0
RXPR16
Initial Value R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
When the data frame in mailbox n (n = 16 to 31) has
been received error-free, RXPRn is set to 1.
[Setting condition]
• Completion of data frame or remote frame
reception in corresponding mailbox
[Clearing condition]
• Writing 1
Note: Writing operation by the CPU is valid only for
clearing condition (writing 1) of set status.
Rev. 2.00, 09/04, page 438 of 720