SH7047 Datasheet, PDF (430/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Table 13.4 A/D Conversion Time (Scan Mode)
CKS1
0
1
CKS0
0
1
0
1
Conversion Time (State)
1024 (Fixed)
512 (Fixed)
256 (Fixed)
128 (Fixed)
13.4.5 A/D Converter Activation by MTU or MMT
The A/D converter can be independently activated by an A/D conversion request from the interval
timer of the MTU or MMT.
To activate the A/D converter by the MTU or MMT, set the A/D trigger select register (ADTSR).
After this register setting has been made, the ADST bit in ADCR is automatically set to 1 when an
A/D conversion request from the interval timer of the MTU or MMT occurs. The timing from
setting of the ADST bit until the start of A/D conversion is the same as when 1 is written to the
ADST bit by software.
13.4.6 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGS0 and TRGS1 bits are set to 00 or 01
in ADTSR, external trigger input is enabled at the ADTRG pin. A falling edge of the ADTRG pin
sets the ADST bit to 1 in ADCR, starting A/D conversion. Other operations, in both single and
scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 13.3 shows
the timing.
CK
ADTRG
External trigger
signal
ADST
A/D conversion
Figure 13.3 External Trigger Input Timing
Rev. 2.00, 09/04, page 390 of 720