SH7047 Datasheet, PDF (568/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Register Bit
Initial
Bit Name Value R/W
Description
PACRL3 4
PA4MD2 0*³
R/W PA4 Mode
PACRL2 9
PA4MD1 0
R/W Select the function of the PA4/A4/POE5/TXD3 pin.
PACRL2 8
PA4MD0 0
R/W 000: PA4 I/O (port)
100: A4 output (BSC)
001: Setting prohibited
101: POE5 input (port)
010: Setting prohibited
110: TXD3 output (SCI)
011: Setting prohibited
111: Setting prohibited
PACRL3 3
PA3MD2 0*³
R/W PA3 Mode
PACRL2 7
PA3MD1 0
R/W Select the function of the PA3/A3/POE4/RXD3 pin.
PACRL2 6
PA3MD0 0
R/W 000: PA3 I/O (port)
100: A3 output (BSC)
001: Setting prohibited
101: POE4 input (port)
010: Setting prohibited
110: RXD3 input (SCI)
011: Setting prohibited
111: Setting prohibited
PACRL3 2
PA2MD2 0*³
R/W PA2 Mode
PACRL2 5
PA2MD1 0
R/W Select the function of the PA2/IRQ0/A2/PCIO/SCK2 pin.
PACRL2 4
PA2MD0 0
R/W 000: PA2 I/O (port)
100: A2 output (BSC)
001: Setting prohibited
101: PCIO I/O (MMT)
010: Setting prohibited
110: SCK2 I/O (SCI)
011: IRQ0 input (INTC)
111: Setting prohibited
PACRL3 1
PA1MD2 0*³
R/W PA1 Mode
PACRL2 3
PA1MD1 0
R/W Select the function of the PA1/A1/POE1/TXD2 pin.
PACRL2 2
PA1MD0 0
R/W 000: PA1 I/O (port)
100: A1 output (BSC)
001: Setting prohibited
101: POE1 input (port)
010: Setting prohibited
110: TXD2 output (SCI)
011: Setting prohibited
111: Setting prohibited
PACRL3 0
PA0MD2 0*³
R/W PA0 Mode
PACRL2 1
PA0MD1 0
R/W Select the function of the PA0/A0/POE0/RXD2 pin.
PACRL2 0
PA0MD0 0
R/W 000: PA0 I/O (port)
100: A0 output (BSC)
001: Setting prohibited
101: POE0 input (port)
010: Setting prohibited
110: RXD2 input (SCI)
011: Setting prohibited
111: Setting prohibited
Notes: 1. F-ZTAT only. Setting prohibited for the mask version.
2. The initial value is 1 in the E10A debugging mode which is specified by a low level on
DBGMD.
3. The initial value is 1 in the on-chip ROM disabled 8-bit external-expansion mode.
Rev. 2.00, 09/04, page 528 of 720