SH7047 Datasheet, PDF (134/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

6.8.2
Handling Interrupt Request Signals as Source for DTC Activating, but Not CPU
Interrupt
1. For DTC, set the corresponding DTE bits to 1 and clear the DISEL bits to 0.
2. Activating sources are applied to the DTC when interrupts occur.
3. When the DTC performs a data transfer, it clears the activating source. An interrupt request is
not sent to the CPU, because the DTE bit is hold to 1.
4. However, when the transfer counter value = 0 the DTE bit is cleared to 0 and an interrupt
request is sent to the CPU.
5. The CPU performs the necessary end processing in the interrupt processing routine.
6.8.3
Handling Interrupt Request Signals as Source for CPU Interrupt but Not DTC
Activating
1. For DTC, clear the corresponding DTE bits to 0.
2. When interrupts occur, interrupt requests are sent to the CPU.
3. The CPU clears the interrupt source and performs the necessary processing in the interrupt
processing routine.
Rev. 2.00, 09/04, page 94 of 720