SH7047 Datasheet, PDF (130/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

6.6.2 Stack after Interrupt Exception Processing
Figure 6.4 shows the stack after interrupt exception processing.
Address
4n–8
4n–4
4n
PC^*1
SR
32 bits
32 bits
SP^*2
Notes: *1 PC: Start address of the next instruction (return destination instruction) after the executing
instruction
*2 Always make sure that SP is a multiple of 4
Figure 6.4 Stack after Interrupt Exception Processing
Rev. 2.00, 09/04, page 90 of 720