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| SH7047 Datasheet, PDF (734/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series | |||
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Register
Power-On Manual
Abbreviation Reset
Reset
Hardware Software Module
Standby Standby Standby Sleep
Module
ADCR_1
Initialized Held
Initialized Initialized Initialized Held
A/D
FLMCR1
Initialized Initialized Initialized Initialized Initialized Held
FLASH
FLMCR2
Initialized Initialized Initialized Initialized Initialized Held
EBR1
Initialized Initialized Initialized Initialized Initialized Held
EBR2
Initialized Initialized Initialized Initialized Initialized Held
UBARH
Initialized Held
Initialized Held
Initialized Held
UBC
UBARL
Initialized Held
Initialized Held
Initialized Held
UBAMRH
Initialized Held
Initialized Held
Initialized Held
UBAMRL
Initialized Held
Initialized Held
Initialized Held
UBBR
Initialized Held
Initialized Held
Initialized Held
UBCR
Initialized Held
Initialized Held
Initialized Held
TCSR
Initialized Initialized Initialized Initialized/ â
Held*1
Held
WDT
TCNT
Initialized Initialized Initialized Initialized â
Held
RSTCSR
Initialized/ Held
Held*2
Initialized Initialized â
Held
SBYCR
Initialized Initialized Initialized Held
â
Held
Power-down state
SYSCR
Initialized Held
Initialized Held
â
Held
MSTCR1
Initialized Held
Initialized Held
â
Held
MSTCR2
Initialized Held
Initialized Held
â
Held
BCR1
Initialized Held
Initialized Held
â
Held
BSC
BCR2
Initialized Held
Initialized Held
â
Held
WCR1
Initialized Held
Initialized Held
â
Held
RAMER
Initialized Held
Initialized Held
â
Held
FLASH
DTEA
Initialized Held
Initialized Initialized Initialized Held
DTC
DTEB
Initialized Held
Initialized Initialized Initialized Held
DTEC
Initialized Held
Initialized Initialized Initialized Held
DTED
Initialized Held
Initialized Initialized Initialized Held
DTCSR
Initialized Held
Initialized Initialized Initialized Held
DTBR
Undefined Held
Held
Held
Held
Held
DTEE
Initialized Held
Initialized Initialized Initialized Held
DTEF
Initialized Held
Initialized Initialized Initialized Held
ADTSR
Initialized Held
Initialized Held
â
Held
A/D
Notes: 1. The bits 7 to 5 (OVF, WT/IT, and TME) in TCSR are initialized and the bits 2 to 0 (CKS2
to CKS0) are retained.
2. RSTCSR is retained in spite of power-on reset by WDT overflow.
Rev. 2.00, 09/04, page 694 of 720
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