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SH7047 Datasheet, PDF (437/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series | |||
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Section 14 Compare Match Timer (CMT)
This LSI has an on-chip compare match timer (CMT) comprising two 16-bit timer channels. The
CMT has 16-bit counters and can generate interrupts at set intervals.
14.1 Features
The CMT has the following features:
⢠Four types of counter input clock can be selected
 One of four internal clocks (PÏ/8, PÏ/32, PÏ/128, PÏ/512) can be selected independently
for each channel.
⢠Interrupt sources
 A compare match interrupt can be requested independently for each channel.
⢠Module standby mode can be set
Figure 14.1 shows a block diagram of the CMT.
CMI0
PÏ/32 PÏ/512
PÏ/8 PÏ/128
CMI1
PÏ/32 PÏ/512
PÏ/8 PÏ/128
Control circuit
Clock selection
Control circuit
Clock selection
Module bus
[Legend]
CMSTR: Compare match timer start register
CMCSR: Compare match timer control/status register
CMCOR: Compare match timer constant register
CMCNT: Compare match timer counter
CMI: Compare match interrupt
CMT
Figure 14.1 CMT Block Diagram
Bus
interface
Internal bus
Rev. 2.00, 09/04, page 397 of 720
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