SH7047 Datasheet, PDF (476/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

15.3.11 Abort Acknowledge Registers (ABACK1, ABACK0)
ABACK1 and ABACK0 are 16-bit registers containing status flags that indicate normal
cancellation (abort) of mailbox transmit messages.
• ABACK1
Bit Bit Name
15 ABACK31
14 ABACK30
13 ABACK29
12 ABACK28
11 ABACK27
10 ABACK26
9
ABACK25
8
ABACK24
7
ABACK23
6
ABACK22
5
ABACK21
4
ABACK20
3
ABACK19
2
ABACK18
1
ABACK17
0
ABACK16
Initial Value R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Status flags that indicate error-free cancellation of
the transmit message in the corresponding
mailboxes from 16 to 31. When the message in
mailbox n (n = 16 to 31) has been canceled error-
free, ABACKn is set to 1.
[Setting condition]
• Completion of transmit message abort for
corresponding mailbox
[Clearing condition]
• Writing 1
Notes: 1. Writing operation by the CPU is valid only
for clearing condition (writing 1) of set
status.
2. Restrictions apply to the use of the
mailbox 31 for transmission. Carefully
read section 15.8, Usage Notes.
Rev. 2.00, 09/04, page 436 of 720