SH7047 Datasheet, PDF (317/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Operation when Error Occurs during Normal Mode Operation, and Operation is Restarted
in Normal Mode: Figure 10.85 shows an explanatory diagram of the case where an error occurs
in normal mode and operation is restarted in normal mode after re-setting.
MTU module
output
TIOC*A
1
2
3
RESET TMDR TOER
(normal) (1)
4
TIOR
(1 init
0 out)
5
6
PFC TSTR
(MTU) (1)
7
Match
8
9
10 11 12
Error PFC TSTR TMDR TIOR
occurs (PORT) (0) (normal) (1 init
0 out)
13
PFC
(MTU)
14
TSTR
(1)
TIOC*B
Port output
PEn
High-Z
PEn
High-Z
n=0 to 15
Figure 10.85 Error Occurrence in Normal Mode, Recovery in Normal Mode
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. After a reset, the TMDR setting is for normal mode.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
5. Set MTU output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Not necessary when restarting in normal mode.
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
Rev. 2.00, 09/04, page 277 of 720