SH7047 Datasheet, PDF (530/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

16.3.4 Timer Counter (MMT_TCNT)
The timer counter (MMT_TCNT) is a 16-bit counter. The initial value is H'0000. Only 16-bit
access can be used on MMT_TCNT; 8-bit access is not possible. (In this section, the name of this
register is abbreviated to TCNT hereafter.)
16.3.5 Timer Buffer Registers (TBR)
The timer buffer registers (TBR) function as 16-bit buffer registers. The MMT has three TBR
registers; TBRU, TBRV, and TBRW, each of which has two addresses; a buffer operation address
(shown first) and a free operation address (shown second). A value written to the buffer operation
address is transferred to the corresponding TGR at the timing set in bits MD1 and MD0 in the
timer mode register (TMDR). A value set in the free operation address is transferred to the
corresponding TGR immediately. The initial value of TBR is H'FFFF. Only 16-bit access can be
used on the TBR registers; 8-bit access is not possible.
16.3.6 Timer General Registers (TGR)
The timer general registers (TGR) function as 16-bit compare registers. The MMT has nine TGR
registers, that are compared with the TCNT counter in the operating modes. The initial value of
TGR is H'FFFF. Only 16-bit access can be used on the TGR registers; 8-bit access is not possible.
16.3.7 Timer Dead Time Counters (TDCNT)
The timer dead time counters (TDCNT) are 16-bit read-only counters. The initial value of TDCNT
is H'0000. Only 16-bit access can be used on the TDCNT counters; 8-bit access is not possible.
16.3.8 Timer Dead Time Data Register (MMT_TDDR)
The timer dead time data register (MMT_TDDR) is a 16-bit register that sets the positive phase
and negative phase non-overlap time (dead time). The initial value of MMT_TDDR is H'FFFF.
Only 16-bit access can be used on MMT_TDDR; 8-bit access is not possible. (In this section, the
name of this register is further abbreviated to TDDR hereafter.)
16.3.9 Timer Period Buffer Register (TPBR)
The timer period buffer register (TPBR) is a 16-bit register that functions as a buffer register for
the TPDR register. A value of 1/2 the PWM carrier period should be set as the TPBR value. The
TPBR value is transferred to the TPDR register at the transfer timing set in the TMDR register.
The initial value of TPBR is H'FFFF. Only 16-bit access can be used on TPBR; 8-bit access is not
possible.
Rev. 2.00, 09/04, page 490 of 720