SH7047 Datasheet, PDF (550/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Initial
Bit Bit Name Value
15
—
0
14
POE6F 0
13
POE5F 0
12
POE4F 0
11 to 9 —
All 0
8
PIE
0
R/W
R
R/(W)*
R/(W)*
R/(W)*
R
R/W
Description
Reserved
This bit is always read as 0 and should only be written
with 0.
POE6 Flag
Indicates that a high impedance request has been input
to the POE6 pin.
[Clearing condition]
• When 0 is written to POE6F after reading POE6F = 1
[Setting condition]
• When the input set by bits 4 and 5 of ICSR2 occurs at
the POE6 pin
POE5 Flag
Indicates that a high impedance request has been input
to the POE5 pin.
[Clearing condition]
• When 0 is written to POE5F after reading POE5F = 1
[Setting condition]
• When the input set by bits 2 and 3 of ICSR2 occurs at
the POE5 pin
POE4 Flag
Indicates that a high impedance request has been input
to the POE4 pin.
[Clearing condition]
• When 0 is written to POE4F after reading POE4F = 1
[Setting condition]
• When the input set by bits 0 and 1 of ICSR2 occurs at
the POE4 pin
Reserved
These bits are always read as 0 and should only be
written with 0.
Port Interrupt Enable
Enables or disables an interrupt request when 1 is set in
any of bits POE4F to POE6F in ICSR2.
0: Interrupt request disabled
1: Interrupt request enabled
Rev. 2.00, 09/04, page 510 of 720