SH7047 Datasheet, PDF (64/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Addressing
Mode
Instruction
Format
Effective Address Calculation
Indirect register @(disp:4, The effective address is the sum of Rn and a 4-bit
addressing with Rn)
displacement (disp). The value of disp is zero-
displacement
extended, and remains unchanged for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
Rn
disp
(zero-extended)
+
×
Rn + disp × 1/2/4
Equation
Byte:
Rn + disp
Word:
Rn + disp × 2
Longword:
Rn + disp × 4
1/2/4
Indirect indexed @(R0, Rn) The effective address is the sum of Rn and R0.
register
addressing
Rn
+
Rn + R0
Rn + R0
R0
Indirect GBR @(disp:8, The effective address is the sum of GBR value and
addressing with GBR)
an 8-bit displacement (disp). The value of disp is
displacement
zero-extended, and remains unchanged for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
GBR
disp
+
(zero-extended)
×
GBR
+ disp × 1/2/4
Byte:
GBR + disp
Word:
GBR + disp ×
2
Longword:
GBR + disp ×
4
Indirect indexed @(R0,
GBR
GBR)
addressing
1/2/4
The effective address is the sum of GBR value and GBR + R0
R0.
GBR
+
GBR + R0
R0
Rev. 2.00, 09/04, page 24 of 720