SH7047 Datasheet, PDF (431/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

13.5 Interrupt Sources and DTC Transfer Requests
The A/D converter generates an A/D conversion end interrupt (ADI) upon the completion of A/D
conversion. ADI interrupt requests are enabled when the ADIE bit is set to 1 while the ADF bit in
ADCSR is set to 1 after A/D conversion is completed. The data transfer controller (DTC) can be
activated by an ADI interrupt. Having the converted data read by the DTC in response to an ADI
interrupt enables continuous conversion to be achieved without imposing a load on software.
The A/D converter can generate an A/D conversion end interrupt request. The ADI interrupt can
be enabled by setting the ADIE bit in the A/D control/status register (ADCSR) to 1, or disabled by
clearing the ADIE bit to 0. The DTC can be activated by an ADI interrupt. In this case an interrupt
request is not sent to the CPU.
When the DTC is activated by an ADI interrupt, the ADF bit in ADCSR is automatically cleared
when data is transferred by the DTC.
Table 13.5 A/D Converter Interrupt Source
Name
ADI
Interrupt Source
A/D conversion completed
Interrupt Source Flag
ADF
DTC Activation
Possible
Rev. 2.00, 09/04, page 391 of 720