SH7047 Datasheet, PDF (110/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

5.7 Stack Status after Exception Processing Ends
The status of the stack after exception processing ends is shown in table 5.11.
Table 5.11 Stack Status after Exception Processing Ends
Types
Address error
Stack Status
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Trap instruction
SP
Address of instruction
after TRAPA instruction
32 bits
SR
32 bits
General illegal instruction
SP ^{Agedndereraslsilolefginasl tirnuscttriuocntioanfter32} bits
SR
32 bits
Interrupt
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Illegal slot instruction
SP
Jump destination address
of delay branch instruction
32 bits
SR
32 bits
Rev. 2.00, 09/04, page 70 of 720