SH7047 Datasheet, PDF(42/764 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

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SH7047 Datasheet, PDF (42/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

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1.1 Features

â¢ Central processing unit with an internal 32-bit RISC (Reduced Instruction Set Computer)

architecture

ï£§ Instruction length: 16-bit fixed length for improved code efficiency

ï£§ Load-store architecture (basic operations are executed between registers)

ï£§ Sixteen 32-bit general registers

ï£§ Five-stage pipeline

ï£§ On-chip multiplier: multiplication operations (32 bits Ã 32 bits â 64 bits) executed in two

to four cycles

ï£§ C language-oriented 62 basic instructions

â¢ Various peripheral functions

ï£§ Data transfer controller (DTC)

ï£§ Multifunction timer/pulse unit (MTU)

ï£§ Motor management timer(MMT)

ï£§ Compare match timer (CMT)

ï£§ Watchdog timer (WDT)

ï£§ Asynchronous or clocked synchronous serial communication interface(SCI)

ï£§ 10-bit A/D converter

ï£§ Clock pulse generator

ï£§ Controller area network2 (HCAN2)

ï£§ User break controller (UBC)*

ï£§ High-performance user debug interface (H-UDI) *

ï£§ Advanced user debugger (AUD)*

Note: * Supported only for flash memory version.

Rev. 2.00, 09/04, page 2 of 720

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