SH7047 Datasheet, PDF (465/764 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Initial
Bit Bit Name Value R/W Description
7
IRR7
0
R/W Overload Frame Interrupt Flag
[Setting condition]
• Overload frame transmitted
[Clearing condition]
• Writing 1
6
IRR6
0
R/W Bus Off/Bus Off Recovery Interrupt Flag
Status flag indicating that the HCAN2 has entered the bus
off state or the HCAN2 has entered from the bus off state
to the error active state.
[Setting conditions]
• When TEC ≥ 256
• When 11 recessive bits are received 128 times (REC
≥ 128) in the bus off state
[Clearing condition]
• Writing 1
5
IRR5
0
R/W Error Passive Interrupt Flag
Status flag indicating the error passive state caused by
the transmit/receive error counter.
[Setting condition]
• When TEC ≥ 128 or REC ≥ 128
[Clearing condition]
• Writing 1
4
IRR4
0
R/W Receive Error Warning Interrupt Flag
Status flag indicating the error warning state caused by
the receive error counter.
[Setting condition]
• When REC ≥ 96
[Clearing condition]
• Writing 1
3
IRR3
0
R/W Transmit Error Warning Interrupt Flag
Status flag indicating the error warning state caused by
the transmit error counter.
[Setting condition]
• When TEC ≥ 96
[Clearing condition]
• Writing 1
Rev. 2.00, 09/04, page 425 of 720