82801DB Datasheet, PDF (89/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Functional Description
5.3.1.6 SYNC Time-Out
There are several error cases that can occur on the LPC interface. Table 5-7 indicates the failing
case and the ICH4 response.
Table 5-7. Intel^® ICH4 Response to Sync Failures
Possible Sync Failure
Intel^® ICH4 Response
Intel^® ICH4 starts a Memory, I/O, or DMA cycle, but no device drives a valid
SYNC after 4 consecutive clocks. This could occur if the processor tries to
access an I/O location to which no device is mapped.
ICH4 aborts the cycle after
the fourth clock.
ICH4 drives a Memory, I/O, or DMA cycle, and a peripheral drives more than 8
consecutive valid SYNC to insert wait-states using the Short (0101b’) encoding Continues waiting
for SYNC. This could occur if the peripheral is not operating properly.
ICH4 starts a Memory, I/O, or DMA cycle, and a peripheral drives an invalid
SYNC pattern. This could occur if the peripheral is not operating properly or if
there is excessive noise on the LPC interface.
ICH4 aborts the cycle when
the invalid Sync is
recognized.
There may be other peripheral failure conditions, however these are not handled by the ICH4.
5.3.1.7
SYNC Error Indication
The SYNC protocol allows the peripheral to report an error via the LAD[3:0] = 1010b encoding.
The intent of this encoding is to give peripherals a method of communicating errors to aid higher
layers with more robust error recovery.
If the ICH4 was reading data from a peripheral, data will still be transferred in the next two nibbles.
This data may be invalid, but it must be transferred by the peripheral. If the ICH4 was writing data
to the peripheral, the data had already been transferred.
In the case of multiple byte cycles (e.g., as for memory and DMA cycles) an error SYNC
terminates the cycle. Therefore, if the ICH4 is transferring 4 bytes from a device and the device
returns the error SYNC in the first byte, the other three bytes will not be transferred.
Upon recognizing the SYNC field indicating an error, the ICH4 will treat this the same as IOCHK#
going active on the ISA bus.
Intel^® 82801DB ICH4 Datasheet
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