82801DB Datasheet, PDF (453/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

SMBus Controller Registers (D31:F3)
13.1.5
13.1.6
13.1.7
13.1.8
REVID—Revision ID Register (SMBUS—D31:F3)
Offset Address: 08h
Default Value: See Bit Description
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Revision Identification Value — RO. Refer to the ICH4 Specification Update for the value of the
Revision ID Register.
SCC—Sub Class Code Register (SMBUS—D31:F3)
Address Offset: 0Ah
Default Value: 05h
Attributes:
Size:
RO
8 bits
Bit
Sub Class Code — RO.
7:0
05h = SM Bus serial controller
Description
BCC—Base Class Code Register (SMBUS—D31:F3)
Address Offset: 0Bh
Default Value: 0Ch
Attributes:
Size:
RO
8 bits
Bit
Base Class Code — RO.
7:0
0Ch = Serial controller.
Description
SMB_BASE—SMBUS Base Address Register
(SMBUS—D31:F3)
Address Offset: 20–23h
Default Value: 00000001h
Attribute:
Size:
R/W, RO
32-bits
Bit
31:16
15:5
4:1
0
Description
Reserved — RO
Base Address — R/W. Provides the 32-byte system I/O base address for the ICH4 SMB logic.
Reserved — RO
I/O Space Indicator — RO. This read-only bit is always 1, indicating that the SMB logic is I/O
mapped.
Intel^® 82801DB ICH4 Datasheet
453