82801DB Datasheet, PDF (505/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

AC ’97 Modem Controller Registers (D31:F6)
15.2.5
x_PICB—Position in Current Buffer Register
I/O Address:
Default Value:
Lockable:
MBAR + 08h (MIPICB),
MBAR + 18h (MOPICB),
0000h
No
Attribute:
Size:
Power Well:
RO
16 bits
Core
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 16-bit
read to offset 08h. Reads across DWord boundaries are not supported.
Bit
Description
15:0
Position In Current Buffer [15:0] — RO. These bits represent the number of samples left to be
processed in the current buffer.
15.2.6
x_PIV—Prefetch Index Value Register
I/O Address:
Default Value:
Lockable:
MBAR + 0Ah (MIPIV),
MBAR + 1Ah (MOPIV)
00h
No
Attribute:
Size:
Power Well:
RO
8 bits
Core
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 8-bit read
to offset 0Ah. Reads across DWord boundaries are not supported.
Bit
Description
7:5 Hardwired to 0
4:0
Prefetched Index Value [4:0] — RO. These bits represent which buffer descriptor in the list has
been prefetched.
Intel^® 82801DB ICH4 Datasheet
505