82801DB Datasheet, PDF (429/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

EHCI Controller Registers (D29:F7)
Bit
Description
SMI on Frame List Rollover — RO. Shadow bit of Frame List Rollover bit in the EHCI_STS register.
19 _{NOTE: To clear this bit system software must write a 1 to the Frame List Rollover bit in the}
EHCI_STS register.
SMI on Port Change Detect — RO. Shadow bit of Port Change Detect bit in the EHCI_STS register.
18 _{NOTE: To clear this bit system software must write a 1 to the Port Change Detect bit in the}
EHCI_STS register.
SMI on USB Error — RO. Shadow bit of USB Error Interrupt (USBERRINT) bit in the EHCI_STS
register.
17
NOTE: To clear this bit system software must write a 1 to the USB Error Interrupt bit in the
EHCI_STS register.
SMI on USB Complete — RO. Shadow bit of USB Interrupt (USBINT) bit in the EHCI_STS register.
16 _{NOTE: To clear this bit system software must write a 1 to the USB Interrupt bit in the EHCI_STS}
register.
SMI on BAR Enable — R/W.
15 0 = Disable.
1 = Enable. When this bit is 1 and SMI on BAR is 1, then the host controller will issue an SMI.
SMI on PCI Command Enable — R/W.
14 ^{0 = Disable.}
1 = Enable. When this bit is 1 and SMI on PCI Command is 1, then the host controller will issue an
SMI.
SMI on OS Ownership Enable — R/W.
13 ^{0 = Disable.}
1 = Enable. When this bit is a 1 AND the OS Ownership Change bit is 1, the host controller will
issue an SMI.
12:6 Reserved — RO. Hardwired to 00h
SMI on Async Advance Enable — R/W.
5
0 = Disable.
1 = Enable. When this bit is a 1, and the SMI on Async Advance bit is a 1, the host controller will
issue an SMI immediately.
SMI on Host System Error Enable — R/W.
4
0 = Disable.
1 = Enable. When this bit is a 1, and the SMI on Host System Error is a 1, the host controller will
issue an SMI.
SMI on Frame List Rollover Enable — R/W.
3
0 = Disable.
1 = Enable. When this bit is a 1, and the SMI on Frame List Rollover bit is a 1, the host controller
will issue an SMI.
SMI on Port Change Enable — R/W.
2
0 = Disable.
1 = Enable. When this bit is a 1, and the SMI on Port Change Detect bit is a 1, the host controller
will issue an SMI.
SMI on USB Error Enable — R/W.
1
0 = Disable.
1 = Enable. When this bit is a 1, and the SMI on USB Error bit is a 1, the host controller will issue an
SMI immediately.
SMI on USB Complete Enable — R/W.
0
0 = Disable.
1 = Enable. When this bit is a 1, and the SMI on USB Complete bit is a 1, the host controller will
issue an SMI immediately.
Intel^® 82801DB ICH4 Datasheet
429