82801DB Datasheet, PDF (5/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Contents
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Introduction ........................................................................................................... 27
1.1 About This Datasheet ....................................................................................27
1.2 Overview ........................................................................................................30
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Signal Description ..............................................................................................37
2.1 Hub Interface to Host Controller ....................................................................39
2.2 Link to LAN Connect ......................................................................................39
2.3 EEPROM Interface ........................................................................................40
2.4 Firmware Hub Interface .................................................................................40
2.5 PCI Interface ..................................................................................................40
2.6 IDE Interface ..................................................................................................43
2.7 LPC Interface .................................................................................................44
2.8 Interrupt Interface...........................................................................................44
2.9 USB Interface.................................................................................................45
2.10 Power Management Interface........................................................................46
2.11 Processor Interface........................................................................................47
2.12 SMBus Interface ............................................................................................48
2.13 System Management Interface ......................................................................48
2.14 Real Time Clock Interface..............................................................................49
2.15 Other Clocks ..................................................................................................49
2.16 Miscellaneous Signals ...................................................................................49
2.17 AC-Link ..........................................................................................................50
2.18 General Purpose I/O ......................................................................................51
2.19 Power and Ground.........................................................................................52
2.20 Pin Straps ......................................................................................................53
2.20.1 Functional Straps ..............................................................................53
2.20.2 External RTC Circuitry ......................................................................54
2.20.3 V5REF / Vcc3_3 Sequencing Requirements ....................................54
2.20.4 Test Signals ......................................................................................55
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Intel^® ICH4 Power Planes and Pin States .................................................57
3.1 Power Planes.................................................................................................57
3.2 Integrated Pull-Ups and Pull-Downs ..............................................................58
3.3 IDE Integrated Series Termination Resistors.................................................58
3.4 Output and I/O Signals Planes and States ....................................................59
3.5 Power Planes for Input Signals......................................................................63
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Intel^® ICH4 and System Clock Domains....................................................65
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Functional Description .....................................................................................67
5.1 Hub Interface to PCI Bridge (D30:F0)............................................................67
5.1.1 PCI Bus Interface..............................................................................67
5.1.2 PCI-to-PCI Bridge Model ..................................................................68
5.1.3 IDSEL to Device Number Mapping ...................................................68
5.1.4 SERR# Functionality.........................................................................68
5.1.5 Parity Error Detection........................................................................70
5.1.6 Standard PCI Bus Configuration Mechanism ...................................71
5.1.7 PCI Dual Address Cycle (DAC) Support...........................................72
Intel^® 82801DB ICH4 Datasheet
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