82801DB Datasheet, PDF (531/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Electrical Characteristics
Table 17-11. Ultra ATA Timing (Mode 0, Mode 1, Mode 2)
Sym
Parameter ⁽¹⁾
Mode 0 (ns) Mode 1 (ns)
Min Max Min Max
STROBE output released-to-
t93 driving to the first transition
0
0
of critical timing (Tzfs)
Data Output Released-to-
t94
Driving Until the First
Tunisian of Critical Timing
70
48
(Tdzfs)
t95
Unlimited Interlock Time
(Tui)
0
0
Maximum time allowed for
t96a
output drivers to release
(from asserted or negated)
10
10
(Taz)
Minimum time for drivers to
t96b assert or negate (from
0
0
released) (Tzad)
Ready-to-final-STROBE time
t97
(no STROBE edges shall be
sent this long after negation
75
70
of DMARDY#) (Trfs)
t98a
Maximum time before
releasing IORDY (Tiordyz)
20
20
Minimum time before driving
t98b IORDY (see Note 2)
0
0
(Tziordy)
Time from STROBE edge to
negation of DMARQ or
t99 assertion of STOP (when
50
50
sender terminates a burst)
(Tss)
Mode 2 (ns)
Min Max
Measuring
Location
0
Device
Connector
31
Sender
Connector
0
Host
Connector
10 See Note 2
0
Device
Connector
60
Sender
Connector
20
Device
Connector
0
Device
Connector
50
Sender
Connector
Figure
NOTES:
1. The specification symbols in parentheses correspond to the AT Attachment - 6 with Packet Interface
(ATA/ATAPI - 6) specification name.
2. See the AT Attachment - 6 with Packet Interface (ATA/ATAPI - 6) Specification for further details on
measuring these timing parameters.
Intel^® 82801DB ICH4 Datasheet
531