82801DB Datasheet, PDF (283/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Hub Interface to PCI Bridge Registers (D30:F0)
8.1.17
8.1.18
8.1.19
MEMBASE—Memory Base Register (HUB-PCI—D30:F0)
Offset Address: 20–21h
Default Value: FFF0h
Attribute:
Size:
R/W
16 bits
This register defines the base of the hub interface to PCI non-prefetchable memory range. Since the
ICH4 will forward all hub interface memory accesses to PCI, the ICH4 will only use this
information for determining when not to accept cycles as a target.
This register must be initialized by the configuration software. For the purpose of address decode,
address bits A[19:0] are assumed to be 0. Thus, the bottom of the defined memory address range
will be aligned to a 1-MB boundary.
Bit
Description
15:4
Memory Address Base — R/W. Defines the base of the memory range for PCI. These 12 bits
correspond to address bits 31:20.
3:0 Reserved
MEMLIM—Memory Limit Register (HUB-PCI—D30:F0)
Offset Address: 22–23h
Default Value: 0000h
Attribute:
Size:
R/W
16 bits
This register defines the upper limit of the hub interface to PCI non-prefetchable memory range.
Since the ICH4 will forward all hub interface memory accesses to PCI, the ICH4 will only use this
information for determining when not to accept cycles as a target.
This register must be initialized by the config software. For the purpose of address decode, address
bits A[19:0] are assumed to be FFFFFh. Thus, the top of the defined memory address range will be
aligned to a 1-MB boundary.
Bit
Description
15:4
Memory Address Limit — R/W. Defines the top of the memory range for PCI. These 12 bits
correspond to address bits 31:20.
3:0 Reserved
PREF_MEM_BASE—Prefetchable Memory Base Register
(HUB-PCI—D30:F0)
Offset Address: 24h–25h
Default Value: 0000FFF0h
Attribute:
Size:
R/W
16 bit
Bit
Description
15:4
Prefetchable Memory Address Base — R/W. Defines the base address of the prefetchable
memory address range for PCI. These 12 bits correspond to address bits 31:20.
3:0 Reserved. RO.
Intel^® 82801DB ICH4 Datasheet
283