82801DB Datasheet, PDF (10/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

8.1.13 SMLT—Secondary Master Latency Timer Register
(HUB-PCI—D30:F0) ....................................................................... 281
8.1.14 IOBASE—I/O Base Register (HUB-PCI—D30:F0) ......................... 281
8.1.15 IOLIM—I/O Limit Register (HUB-PCI—D30:F0) ............................. 281
8.1.16 SECSTS—Secondary Status Register (HUB-PCI—D30:F0).......... 282
8.1.17 MEMBASE—Memory Base Register (HUB-PCI—D30:F0) ............ 283
8.1.18 MEMLIM—Memory Limit Register (HUB-PCI—D30:F0) ................ 283
8.1.19 PREF_MEM_BASE—Prefetchable Memory Base Register
(HUB-PCI—D30:F0) ....................................................................... 283
8.1.20 PREF_MEM_MLT—Prefetchable Memory Limit Register
(HUB-PCI—D30:F0) ....................................................................... 284
8.1.21 IOBASE_HI—I/O Base Upper 16 Bits Register
(HUB-PCI—D30:F0) ....................................................................... 284
8.1.22 IOLIM_HI—I/O Limit Upper 16 Bits Register
(HUB-PCI—D30:F0) ....................................................................... 284
8.1.23 INT_LINE—Interrupt Line Register (HUB-PCI—D30:F0) ............... 284
8.1.24 BRIDGE_CNT—Bridge Control Register (HUB-PCI—D30:F0) ...... 285
8.1.25 HI1_CMD—Hub Interface 1 Command Control Register
(HUB-PCI—D30:F0) ....................................................................... 286
8.1.26 DEVICE_HIDE—Secondary PCI Device Hiding Register
(HUB-PCI—D30:F0) ....................................................................... 287
8.1.27 CNF—ICH4 Configuration Register (HUB-PCI—D30:F0) .............. 288
8.1.28 MTT—Multi-Transaction Timer Register (HUB-PCI—D30:F0) ....... 288
8.1.29 PCI_MAST_STS—PCI Master Status Register
(HUB-PCI—D30:F0) ....................................................................... 289
8.1.30 ERR_CMD—Error Command Register (HUB-PCI—D30:F0) ......... 289
8.1.31 ERR_STS—Error Status Register (HUB-PCI—D30:F0)................. 290
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LPC Interface Bridge Registers (D31:F0)................................................ 291
9.1 PCI Configuration Registers (D31:F0) ......................................................... 291
9.1.1 VID—Vendor ID Register (LPC I/F—D31:F0)................................. 292
9.1.2 DID—Device ID Register (LPC I/F—D31:F0) ................................. 292
9.1.3 PCICMD—PCI COMMAND Register (LPC I/F—D31:F0)............... 293
9.1.4 PCISTA—PCI Device Status (LPC I/F—D31:F0) ........................... 294
9.1.5 REVID—Revision ID Register (LPC I/F—D31:F0).......................... 294
9.1.6 PI—Programming Interface (LPC I/F—D31:F0) ............................. 295
9.1.7 SCC—Sub-Class Code Register (LPC I/F—D31:F0) ..................... 295
9.1.8 BCC—Base-Class Code Register (LPC I/F—D31:F0) ................... 295
9.1.9 HEADTYP—Header Type Register (LPC I/F—D31:F0) ................. 295
9.1.10 PMBASE—ACPI Base Address (LPC I/F—D31:F0)....................... 296
9.1.11 ACPI_CNTL—ACPI Control (LPC I/F — D31:F0)........................... 296
9.1.12 BIOS_CNTL—BIOS Control Register (LPC I/F—D31:F0).............. 297
9.1.13 TCO_CNTL — TCO Control (LPC I/F — D31:F0) .......................... 297
9.1.14 GPIOBASE—GPIO Base Address (LPC I/F—D31:F0) .................. 298
9.1.15 GPIO_CNTL—GPIO Control (LPC I/F—D31:F0) ........................... 298
9.1.16 PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control
(LPC I/F—D31:F0) .......................................................................... 298
9.1.17 SERIRQ_CNTL—Serial IRQ Control (LPC I/F—D31:F0) ............... 299
9.1.18 PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control
(LPC I/F—D31:F0) .......................................................................... 299
9.1.19 D31_ERR_CFG—Device 31 Error Configuration Register
(LPC I/F—D31:F0) .......................................................................... 300
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Intel^® 82801DB ICH4 Datasheet