82801DB Datasheet, PDF (556/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Testability
Table 19-6. XOR Chain 4-1
Pin Name
SDD8
SDD3
Ball #
Y14
AC16
Notes
Top of XOR Chain
2nd signal in XOR
SDD6
W14
SDD10
SDD12
SDD11
SDD1
SDD4
SDD13
SDDREQ
SDD14
SDDACK#
SIORDY
SDA1
SDD15
SDD2
SDA2
SDIOW#
SDD0
SDCS1#
SDIOR#
SDCS3#
SDA0
FERR#
CLK66
HI6
HI5
HI7
AA15
AB16
Y15
AB17
W15
Y16
AB18
AA17
AB19
AC19
AC20
Y17
W16
AC21
AA18
W17
AB21
Y18
AC22
AA20
AA21
T21
T20
R19
R20
Pin Name
HI4
HICOMP
HI_STB#/
HI_STBF
HI_STB/
HI_STBS
HI3
HI2
HI1
HI0
HI10
HI8
HI9
HI11
APICD1
SERIRQ
APICCLK
APICD0
CLK14
SPKR
GPIO41
GPIO39
GPIO40
GPIO38
GPIO42
GPIO43
SDD7
SDD9
SDD5
SLP_S4#
GPIO8
NOTES:
1. RTCRST# asserted for 7 PCI clocks while PWROK active.
2
Ball #
P19
R23
N20
P21
M21
M19
L20
L19
N22
P23
L22
K21
K20
J22
J19
H19
J23
H23
H21
H22
G23
F23
F22
E23
AA14
AC15
AB15
Y2
V4
Notes⁽¹⁾
XOR Chain 4-1
OUTPUT
556
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