82801DB Datasheet, PDF (358/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

LPC Interface Bridge Registers (D31:F0)
9.8.3.4
9.8.3.5
PM1_TMR—Power Management 1 Timer Register
I/O Address:
Default Value:
Lockable:
Power Well:
PMBASE + 08h
(ACPI PMTMR_BLK)
xx000000h
No
Core
Attribute:
Size:
Usage:
RO
32-bit
ACPI
Bit
Description
31:24
23:0
Reserved
Timer Value (TMR_VAL) — RO. Returns the running count of the PM timer. This counter runs off a
3.579545 MHz clock (14.31818 MHz divided by 4). It is reset to zero during a PCI reset, and then
continues counting as long as the system is in the S0 state.
Anytime bit 22 of the timer goes HIGH to LOW (bits referenced from 0 to 23), the TMROF_STS bit is
set. The high-to-low transition will occur every 2.3435 seconds. If the TMROF_EN bit is set, an SCI
interrupt is also generated.
PROC_CNT—Processor Control Register
I/O Address:
Default Value:
Lockable:
Power Well:
PMBASE + 10h
(ACPI P_BLK)
00000000h
No (bits 7:5 are write once)
Core
Attribute:
Size:
Usage:
R/W, RO
32 bit
ACPI or Legacy
Bit
Description
31:18 Reserved
Throttle Status (THTL_STS) — RO.
17 ^{0 = No clock throttling is occurring (maximum processor performance).}
1 = Indicates that the clock state machine is in some type of low power state (where the processor
is not running at its maximum performance): thermal throttling or hardware throttling.
16:9 Reserved
Force Thermal Throttling (FORCE_THTL) — R/W. Software can set this bit to force the thermal
throttling function. This has the same effect as the THRM# signal being active for 2 seconds.
8 0 = No forced throttling.
1 = Throttling at the duty cycle specified in THRM_DTY starts immediately (no 2 second delay), and
no SMI# is generated.
358
Intel^® 82801DB ICH4 Datasheet