82801DB Datasheet, PDF (126/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Functional Description
5.9.4
Specific Interrupts Not Supported via SERIRQ
There are three interrupts seen through the serial stream which are not supported by the ICH4.
These interrupts are generated internally and are not sharable with other devices within the system.
These interrupts are:
• IRQ0. Heartbeat interrupt generated off of the internal 8254 counter 0.
• IRQ8#. RTC interrupt can only be generated internally.
• IRQ13. Floating point error interrupt generated off of the processor assertion of FERR#.
The ICH4 ignores the state of these interrupts in the serial stream, and does not adjust their level
based on the level seen in the serial stream. In addition, the interrupts IRQ14 and IRQ15 from the
serial stream are treated differently than their ISA counterparts. These two frames are not passed to
the Bus Master IDE logic. The Bus Master IDE logic expects IDE to be behind the ICH4.
5.9.5 Data Frame Format
Table 5-28 shows the format of the data frames. For the PCI interrupts (A–D), the output from the
ICH4 is ANDed with the PCI input signal. This way, the interrupt can be signaled via both the PCI
interrupt input signal and via the SERIRQ signal (they are shared).
Table 5-28. Data Frame Format
Data
Frame #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Interrupt
IRQ0
IRQ1
SMI#
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IOCHCK#
PCI INTA#
PCI INTB#
PCI INTC#
PCI INTD#
Clocks Past
Start Frame
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
53
56
59
62
Comment
Ignored. IRQ0 can only be generated via the internal 8524
Causes SMI# if low. Will set the SERIRQ_SMI_STS bit.
Ignored. IRQ8# can only be generated internally or on ISA.
Ignored. IRQ13 can only be generated from FERR#
Do not include in BM IDE interrupt logic
Do not include in BM IDE interrupt logic
Same as ISA IOCHCK# going active.
Drive PIRQA#
Drive PIRQB#
Drive PIRQC#
Drive PIRQD#
126
Intel^® 82801DB ICH4 Datasheet