82801DB Datasheet, PDF (551/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Testability
Testability
19
19.1 Test Mode Description
The ICH4 supports two types of test modes, a tri-state test mode and a XOR Chain test mode.
Driving RTCRST# low for a specific number of PCI clocks while PWROK is high will activate a
particular test mode as described in Table 19-1.
Note: RTCRST# can be driven low any time after PCIRST# is inactive.
.
Table 19-1. Test Mode Selection
Number of PCI Clocks RTCRST# Driven Low After
PWROK Active
<4
4
5
6
7
8
9–13
14
15–42
43–51
52
53
>53
Test Mode
No Test Mode Selected
XOR Chain 1
XOR Chain 2
XOR Chain 3
XOR Chain 4
All “Z”
Reserved. DO NOT ATTEMPT
Long XOR
Reserved. DO NOT ATTEMPT
No Test Mode Selected
XOR Chain 6
XOR Chain 4 Bandgap
No Test Mode Selected
Figure 19-1 illustrates the entry into a test mode. A particular test mode is entered on the rising
edge of RTCRST# after being asserted for a specific number of PCI clocks while PWROK is
active. To change test modes, the same sequence should be followed again. To restore the ICH4 to
normal operation, execute the sequence with RTCRST# being asserted so that no test mode is
selected as specified in Table 19-1.
Figure 19-1. Test Mode Entry (XOR Chain Example)
RSMRST#
PWROK
RTCRST#
Other Signal
Outputs
N Number of PCI Clocks
All Output Signals Tri-Stated
Test Mode Entered
XOR Chain Output Enabled
NOTE: After driving RTCRST# low, should wait 0.1 ms before clocking the testmode with PCICLK. It may take
up to 2 PCICLKS after RTCRST# is brought high to enter the test mode.
Intel^® 82801DB ICH4 Datasheet
551