82801DB Datasheet, PDF (320/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

LPC Interface Bridge Registers (D31:F0)
9.2.9
9.2.10
9.2.11
DMA Master Clear Register
I/O Address:
Default Value:
Ch. #0–3 = 0Dh;
Ch. #4–7 = DAh
xxxx xxxx
Attribute:
WO
Size:
8 bit
Bit
Description
Master Clear — WO. No specific pattern. Enabled with a write to the port. This has the same effect
7:0 as the hardware Reset. The Command, Status, Request, and Byte Pointer flip/flop registers are
cleared and the Mask Register is set.
DMA_CLMSK—DMA Clear Mask Register
I/O Address:
Default Value:
Lockable:
Ch. #0–3 = 0Eh;
Ch. #4–7 = DCh
xxxx xxxx
No
Attribute:
Size:
Power Well:
WO
8 bit
Core
Bit
Description
7:0 Clear Mask Register — WO. No specific pattern. Command enabled with a write to the port.
DMA_WRMSK—DMA Write All Mask Register
I/O Address:
Default Value:
Lockable:
Ch. #0–3 = 0Fh;
Ch. #4–7 = DEh
0000 1111
No
Attribute:
Size:
Power Well:
R/W
8 bit
Core
Bit
Description
7:4 Reserved. Must be 0.
Channel Mask Bits — R/W. This register permits all four channels to be simultaneously enabled/
disabled instead of enabling/disabling each channel individually, as is the case with the Mask
Register - Write Single Mask Bit. In addition, this register has a read path to allow the status of the
channel mask bits to be read. A channel's mask bit is automatically set to 1 when the Current Byte/
Word Count Register reaches terminal count (unless the channel is in auto-initialization mode).
Setting the bit(s) to a 1 disables the corresponding DREQ(s). Setting the bit(s) to a 0 enables the
corresponding DREQ(s). Bits [3:0] are set to 1 upon part reset or Master Clear. When read, bits [3:0]
indicate the DMA channel [3:0] ([7:4]) mask status.
3:0
Bit 0 = Channel 0 (4) 1 = Masked, 0 = Not Masked
Bit 1 = Channel 1 (5) 1 = Masked, 0 = Not Masked
Bit 2 = Channel 2 (6) 1 = Masked, 0 = Not Masked
Bit 3 = Channel 3 (7) 1 = Masked, 0 = Not Masked
NOTE: Disabling channel 4 also disables channels 0–3 due to the cascade of channel’s 0–3 through
channel 4.
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Intel^® 82801DB ICH4 Datasheet