82801DB Datasheet, PDF (50/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Signal Description
2.17 AC-Link
Table 2-17. AC-Link Signals
Name
Type
Description
AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN[2:0]
O AC97 Reset: This signal is a master hardware reset to external Codec(s).
O AC97 Sync: This signal is a 48 kHz fixed rate sample sync to the Codec(s).
AC97 Bit Clock: This signal is a 12.288 MHz serial data clock generated by
I
the external Codec(s). This signal has an integrated pull-down resistor (see
Note at the end of the table).
AC97 Serial Data Out: Serial TDM data output to the Codec(s).
O
NOTE: AC_SDOUT is sampled at the rising edge of PWROK as a functional
strap. See Section 2.20.1 for more details.
I
AC97 Serial Data In 2:0: These signals are Serial TDM data inputs from the
three Codecs.
NOTE: An integrated pull-down resistor on AC_BIT_CLK is enabled when either:
- The ACLINK Shutoff bit in the AC ’97 Global Control Register (See Section 15.2.8) is set to 1, or
- Both Function 5 and Function 6 of Device 31 are disabled.
Otherwise, the integrated pull-down resistor is disabled.
50
Intel^® 82801DB ICH4 Datasheet