82801DB Datasheet, PDF (554/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Testability
Table 19-4. XOR Chain 2
Pin Name
AD8
IRDY#
PERR#
AD14
AD12
AD23
C/BE2#
DEVSEL#
PLOCK#
AD17
AD19
AD21
C/BE3#
AD25
AD27
AD29
AD31
GPIO6
PCICLK
Ball #
K2
L5
L4
L3
L2
M5
M4
M3
Notes
Top of XOR Chain
2nd signal in XOR
M2
N1
N2
N3
N4
P1
P2
R1
P4
R2
P5
Pin Name
GPIO7
LAD0/FWH0
LAD1/FWH1
GPIO21
LDRQ0#
LAD2/FWH2
LAD3/FWH3
LDRQ1#
LFRAME# /
FWH4
THRM#
AC_BIT_CLK
REQ3#
AD7
GPIO8
RI#
AC_SDIN0
AC_SDIN2
AC_SDIN1
TP[0]
NOTES:
1. RTCRST# asserted for 5 PCI clocks while PWROK active.
Ball #
R3
T2
R4
T3
U3
T4
U2
U4
T5
V1
B8
C7
J5
V4
Y1
D13
B13
A13
Notes⁽¹⁾
AB2
XOR Chain 2
OUTPUT
554
Intel^® 82801DB ICH4 Datasheet