82801DB Datasheet, PDF (83/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Functional Description
5.2.2.6
Wake on LAN* (Preboot Wake-Up)
The LAN controller enters Wake on LAN mode after reset if the Wake on LAN bit in the EEPROM
is set. At this point, the LAN controller is in the D0u state.
When the LAN controller is in Wake on LAN mode:
• The LAN controller scans incoming packets for a Magic Packet and asserts the PME# signal
for 52 ms when a one is detected in Wake on LAN mode.
• The Activity LED changes its functionality to indicates that the received frame passed
Individual Address (IA) filtering or broadcast filtering.
• The PCI Configuration registers are accessible to the host.
The LAN controller switches from Wake on LAN mode to the D0a power state following a setup of
the Memory or I/O Base Address Registers in the PCI Configuration space.
5.2.3 Serial EEPROM Interface
The serial EEPROM stores configuration data for the ICH4 integrated LAN controller and is a
serial in/serial out device. The LAN controller supports a 64 register or 256 register size EEPROM
and automatically detects the EEPROM’s size. The EEPROM should operate at a frequency of at
least 1 MHz.
All accesses, either read or write, are preceded by a command instruction to the device. The
address field is six bits for a 64-register EEPROM or eight bits for a 256-register EEPROM. The
end of the address field is indicated by a dummy zero bit from the EEPROM, which indicates the
entire address field has been transferred to the device. An EEPROM read instruction waveform is
shown in Figure 5-5.
Figure 5-5. 64-Word EEPROM Read Instruction Waveform
EE_SHCLKK
EE_CS
EE_DIN
EE_DOUT
A₅
A₄
A₃
A₂
AA₁₀ A₀
READ OP code
D₁₅
D₀
The LAN controller performs an automatic read of seven words (0h, 1h, 2h, Ah, Bh, Ch and Dh) of
the EEPROM after the deassertion of Reset.
Intel^® 82801DB ICH4 Datasheet
83