82801DB Datasheet, PDF (49/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Signal Description
2.14 Real Time Clock Interface
Table 2-14. Real Time Clock Interface
Name
RTCX1
RTCX2
Type
Description
Special Crystal Input 1: This signal is connected to the 32.768 kHz crystal.
Special Crystal Input 2: This signal is connected to the 32.768 kHz crystal.
2.15 Other Clocks
Table 2-15. Other Clocks
Name
Type
CLK14
I
CLK48
I
CLK66
I
Description
Oscillator Clock: This clock is used for 8254 timers. It runs at 14.31818 MHz.
This clock is permitted to stop during S3 (or lower) states
48 MHz Clock: This clock is used to run the USB controllers. It runs at 48
MHz. This clock is permitted to stop during S3 (or lower) states
66 MHz Clock: This clock is used to run the hub interface. It runs at 66 MHz.
This clock is permitted to stop during S3 (or lower) states
2.16 Miscellaneous Signals
Table 2-16. Miscellaneous Signals
Name
SPKR
RTCRST#
TP[0]
Type
O
I
I
Description
Speaker: The SPKR signal is the output of counter 2 and is internally “ANDed”
with Port 61h bit 1 to provide Speaker Data Enable. This signal drives an
external speaker driver device, which in turn drives the system speaker. Upon
PCIRST#, its output state is 0.
NOTE: SPKR is sampled at the rising edge of PWROK as a functional strap.
See Section 2.20.1 for more details. There is a weak integrated pull-
down resistor on SPKR pin.
RTC Reset: When asserted, this signal resets register bits in the RTC well and
sets the RTC_PWR_STS bit (bit 2 in GEN_PMCON3 register).
NOTES:
1. Clearing CMOS in an Intel^® ICH4-based platform can be done by using a
jumper on RTCRST# or GPI, or using SAFEMODE strap. Implementations
should not attempt to clear CMOS by using a jumper to pull VccRTC low.
2. Unless entering the XOR Chain Test Mode, the RTCRST# input must
always be high when all other RTC power planes are on.
Test Point: This signal must have an external pull-up to VccSus3_3.
Intel^® 82801DB ICH4 Datasheet
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