82801DB Datasheet, PDF (532/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Electrical Characteristics
Table 17-12. Ultra ATA Timing (Mode 3, Mode 4, Mode 5)
Sym
Parameter ⁽¹⁾
Mode 3 (ns)
Min Max
Mode 4 (ns)
Min Max
Mode 5 (ns)
Min Max
Measuring
Location
Figure
t80
Sustained Cycle Time
(T2cyctyp)
t81 Cycle Time (Tcyc)
90
39
t82 Two Cycle Time (T2cyc)
86
t83 Data Setup Time (Tds)
7
Recipient IC data setup time
t83b
(from data valid until
STROBE edge)
6.8
(see Note 2) (Tdsic)
t84 Data Hold Time (Tdh)
5
Recipient IC data hold time
t84b
(from STROBE edge until
data may become invalid)
4.8
(see Note 2) (Tdhic)
t85
Data Valid Setup Time
(Tdvs)
20
Sender IC data valid setup
t85b
time (from data valid until
STROBE edge) (see Note 2)
22.6
(Tdvsic)
t86 Data Valid Hold Time (Tdvh) 6.2
Sender IC data valid hold
t86b
time (from STROBE edge
until data may become
9.0
invalid) (see Note 2) (Tdvhic)
t87 Limited Interlock Time (Tli)
0 100
t88
Interlock Time w/ Minimum
(Tmli)
20
t89 Envelope Time (Tenv)
20 55
t90 Ready to Pause Time (Trp) 100
t91
DMACK setup/hold Time
(Tack)
20
t92a
CRC Word Setup Time at
Host (Tcvs)
20
60
25
57
5
40
16.8
38
4.0
Sender
Connector
End
Recipient
Connector
Sender
Connector
Recipient
Connector
17-11
17-11
17-11
4.8
2.3
ICH4 Balls
5
4.6
Recipient
Connector
17-11
4.8
2.8
ICH4 Balls
6.7
4.8
Sender
Connector
17-11
9.5
6.0
ICH4 Balls
6.2
4.8
Sender
Connector
17-11
9.0
6.0
ICH4 Balls
0 100 0
20
20
20 55 20
100
85
20
20
6.7
10
75 See Note 2 17-13
Host
Connector
17-13
50
Host
Connector
17-10
Recipient
Connector
17-12
Host
17-10,
Connector 17-13
Host
Connector
532
Intel^® 82801DB ICH4 Datasheet