82801DB Datasheet, PDF (555/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Testability
Table 19-5. XOR Chain 3
Pin Name
PDD10
PDDREQ
PDD12
PDD14
PDD1
PDD15
PDD0
PDIOR#
PIORDY
Ball #
AC9
AA11
AB10
W11
AC11
Y11
AB11
AC12
Notes
Top of XOR Chain
2nd signal in XOR
AB12
PDDACK#
PDIOW#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#
IRQ15
GPIO19
GPIO18
GPIO22
GPIO20
VRMPWRGD
A20GATE
RCIN#
NC
THRMTRIP#
A20M#
CPUPWRGD
Y12
W12
AC13
AB13
AA13
Y13
W13
AB14
AA19
W18
Y21
Y20
W19
V19
Y22
U22
V20
W20
AB23
Y23
Pin Name
INTR
NMI
IGNNE#
INIT#
STPCLK#
SMI#
CPUSLP#
NC
HI_STB#/
HI_STBF
HI_STB/
HI_STBS
GPIO23
GPIO32
GPIO33
GPIO37
GPIO35
GPIO36
GPIO34
PDD6
PDD4
PDD7
PDD11
PDD5
PDD8
PDD9
PDD13
PDD2
PDD3
INTRUDER#
SLP_S5#
RI#
NOTES:
1. RTCRST# asserted for 6 PCI clocks while PWROK active.
Ball #
AB22
V21
W21
V22
V23
W23
U21
U23
N20
P21
J21
J20
G22
H20
G20
F21
F20
Y8
AA7
AA8
W9
AB8
AB9
Y9
W10
Y10
AA10
W6
AA2
Y1
Notes⁽¹⁾
XOR Chain 3
OUTPUT
Intel^® 82801DB ICH4 Datasheet
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