82801DB Datasheet, PDF (566/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Register Index
Table A-1. Intel^® ICH4 PCI Configuration Registers (Sheet 6 of 10)
Register Name
Secondary Control Block Base
Address Registe
Bus Master Base Address Register
Expansion Base Address Register
Subsystem Vendor ID Register
Subsystem ID Register
Interrupt Line Register
Interrupt Pin Register
IDE Timing Register
Slave IDE Timing
Synchronous DMA Control Register
Synchronous DMA Timing Register
IDE I/O Configuration Register
Vendor ID
Device ID
Command Register
Device Status
Revision ID
Programming Interface
Sub Class Code
Base Class Code
Header Type Register
Base Address Register
Subsystem Vendor ID Register
Offset
Datasheet Location
1C–1Fh
Section 10.1.13, “SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F1)” on page 10-388
20h–23h
Section 10.1.14, “BM_BASE — Bus Master Base Address Register (IDE—
D31:F1)” on page 10-388
24–27h
Section 10.1.15, “EXBAR — Expansion Base Address Register (IDE—
D31:F1)” on page 10-389
2C–2Dh
Section 10.1.16, “IDE_SVID — Subsystem Vendor ID Register (IDE—
D31:F1)” on page 10-389
2E–2Fh
Section 10.1.17, “IDE_SID — Subsystem ID Register (IDE—D31:F1)” on
page 10-389
3Ch
Section 10.1.18, “INTR_LN—Interrupt Line Register (IDE—D31:F1)” on
page 10-390
3Dh
Section 10.1.19, “INTR_PN—Interrupt Pin Register (IDE—D31:F1)” on
page 10-390
40h–43h
Section 10.1.20, “IDE_TIM — IDE Timing Register (IDE—D31:F1)” on
page 10-390
44h
Section 10.1.21, “SLV_IDETIM—Slave (Drive 1) IDE Timing Register
(IDE—D31:F1)” on page 10-392
48h
Section 10.1.22, “SDMA_CNT—Synchronous DMA Control Register
(IDE—D31:F1)” on page 10-393
4Ah–4Bh
Section 10.1.23, “SDMA_TIM—Synchronous DMA Timing Register (IDE—
D31:F1)” on page 10-394
54–57h
Section 10.1.24, “IDE_CONFIG—IDE I/O Configuration Register (IDE—
D31:F1)” on page 10-395
USB Controller (D31:F0,F1,F2)
00–01h
02–03h
04–05h
06–07h
08h
09h
0Ah
0Bh
0Eh
20–23h
2C–2Dh
Section 11.1.1, “VID—Vendor Identification Register (USB—D29:F0/F1/
F2)” on page 11-399
Section 11.1.2, “DID—Device Identification Register (USB—D29:F0/F1/
F2)” on page 11-400
Section 11.1.3, “CMD—Command Register (USB—D29:F0/F1/F2)” on
page 11-400
Section 11.1.4, “STA—Device Status Register (USB—D29:F0/F1/F2)” on
page 11-401
Section 11.1.5, “RID—Revision Identification Register (USB—D29:F0/F1/
F2)” on page 11-401
Section 11.1.6, “PI—Programming Interface (USB—D29:F0/F1/F2)” on
page 11-401
Section 11.1.7, “SCC—Sub Class Code Register (USB—D29:F0/F1/F2)”
on page 11-402
Section 11.1.8, “BCC—Base Class Code Register (USB—D29:F0/F1/F2)”
on page 11-402
Section 11.1.9, “HTYPE—Header Type Register (USB—D29:F0/F1/F2)”
on page 11-402
Section 11.1.10, “BASE—Base Address Register (USB—D29:F0/F1/F2)”
on page 11-403
Section 11.1.11, “SVID — Subsystem Vendor ID (USB—D29:F0/F1/F2)”
on page 11-403
566
Intel^® 82801DB ICH4 Datasheet