82801DB Datasheet, PDF (219/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Functional Description
For I²C Read command, the value written into bit 0 of the Transmit Slave Address Register (SMB
I/O register, offset 04h) needs to be 0. The format that is used for the new command is shown in
Table 5-89.
Table 5-89. I²C Block Read
Bit
1
2–8
9
10
11–18
19
20–27
28
29–36
37
38
39–45
46
47
48–55
56
57–64
65
—
—
—
—
Description
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Send DATA0 register
Acknowledge from slave
Send DATA1 register
Acknowledge from slave
Repeated start
Slave Address - 7 bits
Read
Acknowledge from slave
Data byte from slave
Acknowledge
Data byte 2 from slave - 8 bits
Acknowledge
Data bytes from slave / Acknowledge
Data byte N from slave - 8 bits
NOT Acknowledge
Stop
The ICH4 will continue reading data from the peripheral until the NAK is received.
5.18.1.2
I²C Behavior
When the I2C_EN bit is set, the ICH4 SMBus logic will instead be set to communicate with I²C
devices. This forces the following changes:
• The Process Call command will skip the Command code (and its associated acknowledge)
• The Block Write command will skip sending the Byte Count (DATA0)
In addition, the ICH4 will support the new I²C Read command. This is independent of the I2C_EN
bit.
Note: When operating in I²C mode the ICH4 will not use the 32-byte buffer for block commands.
Intel^® 82801DB ICH4 Datasheet
219