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82801DB Datasheet, PDF (449/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)
EHCI Controller Registers (D29:F7)
12.2.3.2
12.2.3.3
USB PIDs Register
Offset:
Default Value:
04h
00000000h
Attribute:
Size:
R/W, RO
32 bits
This DWord register is used to communicate PID information between the USB debug driver and
the USB debug port. The debug port uses some of these fields to generate USB packets, and uses
other fields to return PID information to the USB debug driver.
Bit
Description
31:24
23:16
15:8
7:0
Reserved. These bits will return 0 when read. Writes will have no effect.
RECEIVED_PID_STS [23:16] — RO. The hardware updates this field with the received PID for
transactions in either direction. When the controller is writing data, this field is updated with the
handshake PID that is received from the device. When the host controller is reading data, this field
is updated with the data packet PID (if the device sent data), or the handshake PID (if the device
NAKs the request). This field is valid when the hardware clears the GO_DONE#_CNT bit.
SEND_PID_CNT [15:8] — R/W. The hardware sends this PID to begin the data packet when
sending data to USB (i.e., WRITE_READ#_CNT is asserted). Software will typically set this field to
either DATA0 or DATA1 PID values.
TOKEN_PID_CNT [7:0] — R/W. Hardware sends this PID as the Token PID for each USB
transaction. Software typically sets this field to either IN, OUT, or SETUP PID values.
Data Buffer Bytes 7:0 Register
Offset:
Default Value:
08h
0000000000000000h
Attribute:
Size:
R/W
64 bits
This register can be accessed as 8 separate 8-bit registers or 2 separate 32-bit register.
Bit
Description
DATA_BUFFER [63:0] — R/W. These are the 8 bytes of the data buffer. The bytes in the Data
Buffer must be written with data before software initiates a write request. For a read request, the
Data Buffer contains valid data when DONE_STS bit is cleared by the hardware,
ERROR_GOOD#_STS is cleared by the hardware, and the DATA_LENGTH_CNT field indicates
the number of bytes that are valid.
63:0
Bits 63:56 Correspond to the most significant byte (byte 7).
...
...
Bits 7:0
Correspond to least significant byte (byte 0).
Intel® 82801DB ICH4 Datasheet
449