82801DB Datasheet, PDF (260/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

LAN Controller Registers (B1:D8:F0)
7.1.22
7.1.23
PM_CAP — Power Management Capabilities
(LAN Controller—B1:D8:F0)
Offset Address: DE–DFh
Default Value: FE21h
Attribute:
Size:
RO
16 bits
Bit
Description
15:11
10
9
8:6
5
4
3
2:0
PME Support — RO. Hardwired to 11111b. This 5-bit field indicates the power states in which the
LAN controller may assert PME#. The LAN controller supports wake-up in all power states.
D2 Support — RO. Hardwired to 1 to indicate that the LAN controller supports the D2 power state.
D1 Support — RO. Hardwired to 1 to indicate that the LAN controller supports the D1 power state.
Auxiliary Current — RO. Hardwired to 000b to indicate that the LAN controller implements the Data
registers. The auxiliary power consumption is the same as the current consumption reported in the
D3 state in the Data register.
Device Specific Initialization (DSI) — RO. Hardwired to 1 to indicate that special initialization of this
function is required (beyond the standard PCI configuration header) before the generic class device
driver is able to use it. DSI is required for the LAN controller after D3-to-D0 reset.
Reserved
PME Clock — RO. Hardwired to 0 to indicate that the LAN controller does not require a clock to
generate a power management event.
Version — RO. Hardwired to 010b to indicate that the LAN controller complies with of the PCI
Power Management Specification, Revision 1.1.
PMCSR — Power Management Control/Status Register
(LAN Controller—B1:D8:F0)
Offset Address: E0–E1h
Default Value: 0000h
Attribute:
Size:
R/WC, R/W, RO
16 bits
Bit
Description
15
14:13
12:9
8
7:5
4
3:2
PME Status — R/WC.
0 = Software clears this bit by writing a 1 to the bit location. This also deasserts the PME# signal
and clears the PME status bit in the Power Management Driver Register. When the PME#
signal is enabled, the PME# signal reflects the state of the PME status bit.
1 = Set upon occurrence of a wake-up event, independent of the state of the PME Enable bit.
Data Scale — RO. This field indicates the data register scaling factor. It equals 10b for registers
zero through eight and 00b for registers nine through fifteen, as selected by the “Data Select” field.
Data Select — R/W. This field is used to select which data is reported through the Data register and
Data Scale field.
PME Enable — R/W. This bit enables the Intel^® ICH4’s integrated LAN controller to assert PME#.
0 = The device will not assert PME#.
1 = Enable PME# assertion when PME Status is set.
Reserved
Dynamic Data — RO. Hardwired to 0 to indicate that the device does not support the ability to
monitor the power consumption dynamically.
Reserved
260
Intel^® 82801DB ICH4 Datasheet