82801DB Datasheet, PDF (60/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

Intel^® ICH4 Power Planes and Pin States
Table 3-4. Power Plane and States for Output and I/O Signal (Sheet 2 of 4)
Signal Name
Power
Plane
During
PCIRST#⁴ /
RSMRST#^5,7
Immediately
after
PCIRST#⁴ /
RSMRST#⁵
S1
LPC Interface
LAD[3:0]
Main I/O
High
High
High
LFRAME#
Main I/O
High
High
High
LAN Connect and EEPROM Interface
EE_CS
Resume I/O
Low
Running
Defined
EE_DOUT
Resume I/O
High
High
Defined
EE_SHCLK
Resume I/O
Low
Running
Defined
LAN_RSTSYNC
Resume I/O
High
Defined
Defined
LAN_TXD[2:0]
Resume I/O
Low
Defined
Defined
IDE Interface
PDA[2:0], SDA[2:0]
Main I/O
Undefined Undefined Undefined
PDCS1#, PDCS3#
PDD[15:8], SDD[15:8],
PDD[6:0], SDD[6:0]
PDD[7], SDD[7[
Main I/O
Main I/O
Main I/O
High
High-Z
Low
High
High-Z
Low
High
High-Z
Low
PDDACK#, SDDACK# Main I/O
High
High
High
PDIOR#, PDIOW#
Main I/O
High
High
High
SDCS1#, SDCS3#
Main I/O
High
High
High
SDIOR#, SDIOW#
Main I/O
High
High
High
Interrupts
PIRQ[A:H]#
Main I/O
High-Z
High-Z
High-Z
SERIRQ
Main I/O
High-Z
High-Z
High-Z
APICD[1:0]
Main I/O
High-Z
High-Z
High-Z
USB Interface
USBP[5:0][P,N]
Resume I/O
Low
Low
Low
USBRBIAS
Resume I/O
High-Z
High-Z
Defined
S3
Off
Off
Defined
Defined
Defined
Defined
Defined
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Low
Defined
S4/S5
Off
Off
Defined
Defined
Defined
Defined
Defined
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Low
Defined
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Intel^® 82801DB ICH4 Datasheet